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¡ß Application
- 4", 5", 6" silicon wafer or glass substrate
- System for semiconductor, display and opto-electronics
¡ß System Configuration (standard)
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Wafer-to-wafer full automatic handling
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Helical ICP source
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Source & bias RF generators and matchers
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Single chamber for Etching or Ashing
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Vacuum loadlock & robot (3-axis)
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Back side Helium cooling with mechanical chuck (ESC Available)
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Wide range optical emission spectroscope
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Programmable control & GUI
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Wide Range Chiller (-25 ~ 30¡É)
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2200 lps Tmp with Dry pump
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ISO 250 Apc valve
¡ß Hardware Specification
- Base Pressure ¡Â 1mTorr
- Leak Rate ¡Â 2mTorr/min, process chamber
¡Â 10mTorr/min, L/L chamber
- Cycle test No fail up to 1,000 cycles
- MTBF £¾ 150 hours
- MTTR £¼ 3 hours
- Up time £¾ 85%
- Thruput £¾ 20 wafers/hour (1min processing)
¡ß Process Specification
- Process capability up to sub-micron feature size
- HDP etching for noble metal and si trench
- Etch rate £¾ 7,000 ¡Ê/min , Oxide
£¾ 7,000 ¡Ê/min , LP Nitride
£¾ 30,000 ¡Ê/min , Si, Poly
£¾ 20,000 ¡Ê/min , PR Ashing
- Selectivity(Silicon to Oxide) ~200:1
- Uniformity ¡Â ±5 % within wafer
¡Â ±3 % wafer to wafer
¡ß Cost & Technology Competitiveness
- Higher performance with lower price
- Customizing backbone
- Lower CoC & easy maintenance
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